As the technology of semiconductor fabrication processes, the critical dimension (CD) has been reduced making lithography processes more and more challenging. Of particular importance is the control of line width roughness (LWR) or line edge roughness (LER). Line edge or width roughness generally refers to the roughness of a width or edge of a line of material in a semiconductor device (e.g., during fabrication). Uncontrolled LWR and LER can have a significant impact on the resulting semiconductor device (e.g., transistor). These impacts include parametric device performance and yield, for example, variations in critical dimension (CD) can cause variations is current (Ioff, Idsat). Other key concerns of the photolithography process include defects such as particles and water-marks. The conventional photolithography processes are typically insufficient to address these concerns. Therefore, a photolithography process and/or clean addressing the above issues is needed.